Hardware implementations of cryptosystems are susceptible to side channel attacks. A side channel attack does not use brute force or a theoretical weakness in a cryptographic algorithm to defeat a cryptosystem, but instead relies on information gained from the physical implementation of the cryptosystem. For example, electromagnetic leaks can be analyzed and exploited to defeat a cryptosystem. To counteract side channel attacks, internal operations of the cryptosystem may be masked with random bits. With first order masking, an internal operation is masked with one random bit. Such first order masking offers some protection, but generally is not considered strong enough for very sensitive information. With second order masking, an internal operation is masked with two or more random bits. Second order masking provides security deemed sufficient for most information. Third and higher order masking provides even stronger security, but can be computationally expensive.